diff --git a/config/_default/menus.toml b/config/_default/menus.toml
index 802d799..c800568 100644
--- a/config/_default/menus.toml
+++ b/config/_default/menus.toml
@@ -1,5 +1,5 @@
 [[main]]
-name = "CPU Documentation"
+name = "ISA Documentation"
 pageRef = "/docs/introduction"
 weight = 1
 
diff --git a/content/_index.md b/content/_index.md
index c1e7726..592de9b 100644
--- a/content/_index.md
+++ b/content/_index.md
@@ -11,17 +11,17 @@ layout = "hextra-home"
 <div class="hx-mt-6 hx-mb-6">
 {{< hextra/hero-headline >}}
   A complete toolset for the LC-2, <br>
-  LC-3 and LC-3b processors
+  LC-3 and LC-3b ISAs
 {{< /hextra/hero-headline >}}
 </div>
 
 <div class="hx-mb-12">
 {{< hextra/hero-subtitle >}}
   A free and open-source emulator, assembler and compiler suite <br>
-  for the *Little Computer* series of CPU
+  for the *Little Computer* series of ISAs
 {{< /hextra/hero-subtitle >}}
 </div>
 
 <div class="hx-mb-6">
-  {{< hextra/hero-button text="Read the CPU docs" link="docs/introduction" >}}
+  {{< hextra/hero-button text="Read the ISA docs" link="docs/introduction" >}}
 </div>
diff --git a/content/docs/introduction.md b/content/docs/introduction.md
index 51ffebf..a922e78 100644
--- a/content/docs/introduction.md
+++ b/content/docs/introduction.md
@@ -3,18 +3,19 @@ title = "Introduction"
 weight = 100
 +++
 
-The *Little Computer* is a family of processors based on the Von Neumann
-architecture, created by [Yale N. Patt](https://users.ece.utexas.edu/~patt/)
-and [Sanjay J. Patel](https://sjp.ece.illinois.edu/) to teach their students
-about computer architecture.
+The *Little Computer* is a family of *Instruction Set Architecture* (ISA) based
+on the Von Neumann architecture, created by [Yale N.
+Patt](https://users.ece.utexas.edu/~patt/) and [Sanjay J.
+Patel](https://sjp.ece.illinois.edu/) to teach their students about computer
+architecture.
 
 The processors in this family are extremely simple and they all feature a
 *very* [RISC](https://en.wikipedia.org/wiki/RISC) instruction set; they all
-have a 16-bit address bus and a 16-bit data bus, except for the last CPU in the
-family -- the LC-3b -- which has an 8-bit data bus.
+have a 16-bit address bus and a 16-bit data bus, except for the latest
+architecture of the group -- the LC-3b -- which has an 8-bit data bus.
 
-The most famous CPU in this family is without a doubt the LC-3, the third
-iteration of the architecture: on this processor people made a
+The most famous ISA of this category is without a doubt the LC-3, the third
+iteration of the architecture: on this specific ISA people made a
 [subreddit](https://reddit.com/r/lc3), a [Wikipedia
 page](https://en.wikipedia.org/wiki/Little_Computer_3), an [online
 emulator](https://wchargin.com/lc3web/) and it's the easiest to find online
@@ -22,13 +23,13 @@ using a search engine.
 
 ## Why am I doing this?
 
-The goal of this project is to make more people know about this family of CPUs,
+The goal of this project is to make more people know about this family of ISAs,
 which I believe is ideal for teaching computer architecture, operating systems
 and programming languages.
 
-Naturally, the focus will be on the last two processors of the series, the LC-3
-and LC-3b, as they are the most recent, the most comprehensive, and, in my
-opinion, the most interesting.
+Naturally, the focus will be on the last two ISAs of the series, the LC-3 and
+LC-3b, as they are the most recent, the most comprehensive, and, in my opinion,
+the most interesting.
 
 ## Roadmap